Job Description
Senior Analog Layout Engineer
Location: Hyderabad, Bangalore
Experience: 4 to 6 Years
Notice Period: Immediate
Job Description:
Key Responsibilities
Custom Layout Design: Lead the layout development of critical analog blocks, including high-speed ADCs/DACs, PLLs, Ser Des, Bandgaps, and LDOs.
Advanced Node Implementation: Navigate challenges unique to sub-3nm nodes , such as multi-patterning, EUV constraints, and Fin FET/GAAFET-specific layout-dependent effects (LDE).
Physical Verification: Execute and debug comprehensive verification flows, including DRC, LVS, ERC, Antenna, and Latch-up checks using industry-standard tools.
Extraction & Analysis: Perform parasitic extraction (PEX) and collaborate with designers on post-layout simulations to meet stringent timing and performance targets.
Floorplanning: Optimize block-level and top-level floorplans to manage IR drop, Electromigration (EM), and Thermal-aware placement.
Reliability & DFM: Implement Design f...
Location: Hyderabad, Bangalore
Experience: 4 to 6 Years
Notice Period: Immediate
Job Description:
Key Responsibilities
Custom Layout Design: Lead the layout development of critical analog blocks, including high-speed ADCs/DACs, PLLs, Ser Des, Bandgaps, and LDOs.
Advanced Node Implementation: Navigate challenges unique to sub-3nm nodes , such as multi-patterning, EUV constraints, and Fin FET/GAAFET-specific layout-dependent effects (LDE).
Physical Verification: Execute and debug comprehensive verification flows, including DRC, LVS, ERC, Antenna, and Latch-up checks using industry-standard tools.
Extraction & Analysis: Perform parasitic extraction (PEX) and collaborate with designers on post-layout simulations to meet stringent timing and performance targets.
Floorplanning: Optimize block-level and top-level floorplans to manage IR drop, Electromigration (EM), and Thermal-aware placement.
Reliability & DFM: Implement Design f...