💼 Full-Time Position

ASIC Design Verification Engineer, TPU

🏢
Google
📍 Sunnyvale, CA, United States
📍
Location
Sunnyvale, United States
📅
Posted
June 06, 2026
Type
Full-Time
🎯

Full-Time Opportunity: This is a permanent, full-time position with a competitive package and real career growth potential.

Job Description

ASIC Design Verification Engineer, TPU

_corporate_fare_ Google _place_ Sunnyvale, CA, USA

**Mid**

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 4 years of experience with design verification.
+ Experience with SystemVerilog/Verilog.

**Preferred qualifications:**

+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
+ 6 years of experience with silicon design verification.
+ Experience contributing across the entire design and verification life cycle.
+ Experience optimizing tools, flows, and methodologies to improve efficiency.
+ Experience with scripting...