💼 Full-Time Position

ASIC Functional Verification Architect

🏢
Cadence System Design and Analysis
📍 Bengaluru, Karnataka, India
📍
Location
Bengaluru, India
📅
Posted
June 03, 2026
⏰
Type
Full-Time
🎯

Full-Time Opportunity: This is a permanent, full-time position with a competitive package and real career growth potential.

Job Description

Key Responsibilities:

  • Lead DesignVerification (DV) execution of UCIe PHY IP.
  • Drive internal DV team meeting for day to day execution. Work closely with RTL, AMS system modelling and PD teams.
  • Lead technical alignment on verification strategies. Define and architect verification environments and methodologies.
  • Take initiative to drive overall execution efficiency and quality improvements.
  • Improve and evolve existing verification methodologies : Co-Simulation (Co-SIM), UPF Power Aware Simulations (UPF PA Sim), VIP/DIP integration and Verification, increase Formal Verification usage especially FPV, Safety Verification
  • Analyze execution and quality issues to define, develop, and deploy new functional verification methodologies for continuous improvement.


Required Qualifications:

  • Solid background in functional verification fundamentals.
  • Experience in:
  • Verification environment developmen...