Job Description
Job DescriptionESL methodology development and deployment, system level modeling and HW/SW system level bottleneck analysis
#LI-LL1Requirement1. RTL design experience
2. Chip level architecture design or System level C/C++/SC modeling experience is a plus
3. C/C++ programming is a plus
4. SystemC, TLM2.0 and ESL experience is a plus
5. SW based emualtor (ex: QEMU) or HW based emulator experience is a plus
6. RTOS or driver porting is a plus
#LI-LL1Requirement1. RTL design experience
2. Chip level architecture design or System level C/C++/SC modeling experience is a plus
3. C/C++ programming is a plus
4. SystemC, TLM2.0 and ESL experience is a plus
5. SW based emualtor (ex: QEMU) or HW based emulator experience is a plus
6. RTOS or driver porting is a plus