Job Description
1、参与DPU/SSD芯片的应用场景与需求分析；
2、参与DPU/SSD芯片架构方案的讨论与可验证性分析；
3、负责BT/IT/ST的验证策略与方案制定；
4、负责BT/IT/ST的Feature提取与测试点分解与TC规划；
5、负责验证环境搭建与仿真，与设计团队一起bug收敛；
6、负责门仿与后仿，确保门级功能与时序正确；
Job responsibilities:
1. Participate in the analysis of application scenarios and requirements of DPU/SSD chips;
2. Participate in the discussion and verifiable analysis of DPU/SSD chip architecture;
3. Be responsible for the verification strategy and scheme design of BT/IT/ST;
4. Be responsible for feature extraction of BT/IT/ST, decomposition of test points and TC planning;
5. Be responsible for verification environment coding and simulation, and eliminating bugs together with the design team;
6. Be responsible for gate level and post level simulation to ensure the netlists are functional and timing correct;
2、参与DPU/SSD芯片架构方案的讨论与可验证性分析；
3、负责BT/IT/ST的验证策略与方案制定；
4、负责BT/IT/ST的Feature提取与测试点分解与TC规划；
5、负责验证环境搭建与仿真，与设计团队一起bug收敛；
6、负责门仿与后仿，确保门级功能与时序正确；
Job responsibilities:
1. Participate in the analysis of application scenarios and requirements of DPU/SSD chips;
2. Participate in the discussion and verifiable analysis of DPU/SSD chip architecture;
3. Be responsible for the verification strategy and scheme design of BT/IT/ST;
4. Be responsible for feature extraction of BT/IT/ST, decomposition of test points and TC planning;
5. Be responsible for verification environment coding and simulation, and eliminating bugs together with the design team;
6. Be responsible for gate level and post level simulation to ensure the netlists are functional and timing correct;