Job Description
Job responsibilities: The engineer should have prior experience in most of the below responsibilities or keen to adapt Technical Digital/DMS/AMS testbench creation and generation Behavioral Modeling in SV-RNM and Model Validation Methodologies Define AMS VPLAN for an IP to make sure all AMS features are covered in DV Create Test strategy of replicating Silicon non linearities behavior on Analog signals such as jitter, noise effect, ISI Mixed-Signal Assertions and Checkers Power intent verification including Low power states, state retention and CPF/UPF integration Push technology for mixed-signal modeling, simulation and DV in order to improve mixed signal verification efficiency and accuracy. Ensure scalable mixed-signal DV solutions to cover the breadth of IPG offerings including SerDes, DDR, A2D converters and custom solutions Mentor junior engineers technically and collaborate closely with Digital, Analog, Firmware and Test engineers, Internal methodology and tool development teams...