💼 Full-Time Position

Principal RTL Engineer – FPGA Debug & EDA Architecture

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Lattice Semiconductor
📍 Hyderabad, Telangana, India
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Location
Hyderabad, India
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Posted
June 03, 2026
Type
Full-Time
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Full-Time Opportunity: This is a permanent, full-time position with a competitive package and real career growth potential.

Job Description

About Lattice At Lattice, we believe in building technology with focus and intent. We develop low-power programmable solutions that enable innovation across edge AI, connectivity, and security. Our teams work across silicon, software, and systems—with a strong emphasis on ownership, speed, and real impact . Here, engineers don’t just contribute to parts of a system—they help define how the system works end-to-end , including the tools that bring silicon to life. We’re looking for a Principal RTL Engineer to lead the architecture and development of FPGA debug infrastructure within Lattice’s tool ecosystem. This is a unique opportunity to work on on-chip debug, observability, and instrumentation capabilities , shaping how engineers analyze and optimize designs on Lattice platforms. You’ll operate at the intersection of RTL, FPGA architecture, and tooling , with the ability to influence both design and user experience . What You’ll Do Architect and develop FPGA debug engines and instrumen...