💼 Full-Time Position

Safety Verification Methodology Engineer

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MediaTek
📍 Hsinchu City, Taiwan Province, Taiwan
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Location
Hsinchu City, Taiwan
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Posted
June 05, 2026
Type
Full-Time
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Full-Time Opportunity: This is a permanent, full-time position with a competitive package and real career growth potential.

Job Description

Job Description1.Develop fault simulation flow for function safety.
2.Deploy fault simulation for safety IPs
3.Co-work with IP design verification teams to achieve pre-silicon verification of hardware safety requirements

#LI-LL1
Requirement1.10+ years of engineering experience in IC design industry
2.5+ experience in design verification
3.Capability to collaborate with cross-organizations
4.Knowledge of ISO 26262, including the function safety aspects of design verification (preferred)
5.Experience in fault simulation (preferred)