Job Description
Elevate high-speed mixed-signal silicon design as a Senior Analog / RF Layout Engineer at Capgemini in Toronto, Canada. Work on advanced FinFET technologies, driving innovation in next-generation layouts.
Key Responsibilities
- Design robust, scalable layouts for high-speed analog circuits
- Develop circuit layouts in advanced FinFET technologies (7nm and below)
- Drive layout reviews and verification to ensure compliance
- Mentor junior engineers and advocate for best engineering practices
- Partner with designers to enhance layout quality and performance
Requirements
- 6+ years of experience in analog and RF IC layout
- Proficient in industry-standard EDA tools like Cadence
- Hands‑on experience with high-speed transceivers and CMOS drivers
- Robust understanding of layout practices and thermal considerations
- Proven capability in floor planning and electromigration analysis