Senior ASIC Research Engineer - Analog & DDR3 PHY

Barcelona Supercomputing Center (BSC-CNS) is seeking a Research Engineer to focus on ASIC design, particularly on analog and mixed-signal design projects. The role requires a Master's degree in Electronic Engineering and at least 3 years of experience in analog and digital design tools. You will design circuits, conduct power analyses, and work collaboratively within a team. Benefits include flexible hours, private health insurance, and a competitive salary. Preferred start date is June 1, 2026.
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