Senior DFT Design Engineer — RTL/ATPG Expert

A leading semiconductor company in Barcelona is seeking a Staff DFT Design Engineer to lead design, implementation, and verification of DFT architectures for a range of products. The ideal candidate should possess a BSEE with 15 years or MSEE with 12 years of experience in DFT. Proficiency in RTL Verilog, System Verilog, and various DFT techniques is essential. The position offers an opportunity to work in a collaborative environment focused on innovation in the semiconductor space.
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