Job Description
We are seeking an experienced, highly motivated and high-caliber individual with below expertise. Does this sound like a good role for you?
- Sr Staff RTL Design Engineer (R&D engineering)
- Location: Bengaluru
- Experience: 9yrs to 15yrs
- BSEE with 9 years of relevant experience OR MSEE with 8 years of relevant experience.
- Expertise in RTL development using Verilog or System Verilog, with a strong background in digital design principles.
- Hands-on experience with Xilinx and Altera FPGA platforms, including familiarity with Xilinx Vivado and related tools.
- Proficiency in developing large, complex EDA software and managing the full design flow from concept to lab bring-up.
- Advanced problem-solving and debugging skills, especially in digital verification, emulation, and prototyping environments.
- Experience with scripting languages such as Tcl, Py...