💼 Full-Time Position

SoC Debug / Post-Silicon PnP Validation Engineer

🏢
Intel
📍 San Jose, CA, United States
📍
Location
San Jose, United States
📅
Posted
June 27, 2026
Type
Full-Time
🎯

Full-Time Opportunity: This is a permanent, full-time position with a competitive package and real career growth potential.

Job Description

**Job Details:**

**Job Description:**

**About the Role**

Intel is seeking a motivated and detail-oriented **SoC Debug / Post-Silicon** **PnP** **Validation Engineer** to join our Silicon Architecture diverse team, where innovation meets execution. In this role, you will work on cutting-edge technologies, performing comprehensive power and performance validation, low-level debug tasks, and complex analysis at the SoC level for Intel products.

Your expertise and contributions will help identify and resolve critical issues, improve validation methodologies, and ensure the reliability and performance of our industry-leading products. This role has a direct impact on Intel's success by driving advancements in design for debug (DFD) tools, power validation scripts, and methodologies, ultimately delivering world-class solutions that power the future of computing.

**What You’ll Do**

**Key responsibilities will include but not limited ...