Job Description
Description
One C++ codebase. Three radically different execution environments. We're looking for an engineering manager who thinks in terms of platforms, abstractions, and portable software architecture — and can lead a team that ships all three.
Our SoC HAL (Hardware Abstraction Layer) team builds the platform software layer for AWS's custom Trainium and Inferentia ML accelerator chips. The HAL is a shared library that boots, configures, and manages every hardware block on the SoC — 270+ instances per chip — and the same source tree compiles and runs on SystemVerilog DPI for chip verification, QEMU for system emulation, and Carbon OS in microcontrollers within the AWS production fleet. Your platform abstractions are what make this possible, and your APIs are the interface that 100's of engineers across verification, emulation, and production use to interact with the chip.
Tech stack: C++17, CMake, GoogleTest, Python, SystemVerilog DPI, SPI, APB/AXI bus protocols,...
One C++ codebase. Three radically different execution environments. We're looking for an engineering manager who thinks in terms of platforms, abstractions, and portable software architecture — and can lead a team that ships all three.
Our SoC HAL (Hardware Abstraction Layer) team builds the platform software layer for AWS's custom Trainium and Inferentia ML accelerator chips. The HAL is a shared library that boots, configures, and manages every hardware block on the SoC — 270+ instances per chip — and the same source tree compiles and runs on SystemVerilog DPI for chip verification, QEMU for system emulation, and Carbon OS in microcontrollers within the AWS production fleet. Your platform abstractions are what make this possible, and your APIs are the interface that 100's of engineers across verification, emulation, and production use to interact with the chip.
Tech stack: C++17, CMake, GoogleTest, Python, SystemVerilog DPI, SPI, APB/AXI bus protocols,...