Staff IP Design Engineer - FPGA Connectivity & RTL Lead

Lattice Semiconductor in Penang, Malaysia, is looking for a Staff IP Design Engineer with at least 8 years of experience in FPGA design. This role involves leading the technical development of Connectivity IP portfolios, translating specifications into high-speed RTL designs. Candidates should possess strong programming skills in languages including C/C++ and Python. A team-oriented candidate who thrives in dynamic environments is desired. The position requires excellent communication skills.
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